1. Field of the Invention
The present invention relates to a pattern inspection carried out in the process of producing semiconductor integrated circuit devices.
2. Description of the Prior Art
Recently, it has become difficult to inspect circuit patterns of integrated circuits and to inspect a mask and a reticle used to draw circuit patterns by exposure as the integration density has increased.
A conventional pattern inspection uses a scanning-type electron microscope (SEM) by which circuit patterns are observed. The observation results are compared with the results of observation of normal patterns stored in a memory beforehand, or are compared with data stored in a database. Normally, a low acceleration voltage equal to or lower than 1 kV is used in the observation using the scanning-type electron microscope in order to avoid charging up.
However, the use of such a low acceleration voltage makes it difficult to reduce the size of the electron beam and obtain a large beam current while obtaining a wide field of view.
Recently, an electron microscope has been proposed which has a reduced lens cylinder or barrel in order to simultaneously realize a reduced size of the electron beam and an increased beam current. However, such a proposed electron microscope has a difficulty in the formation of a wide field of view and needs an increased number of movement steps of the stage. This prevents speeding up of the inspection.